欢迎有志于研究模拟射频芯片和数字雷达算法芯片设计的同学加入。

研究方向:

毫米波/太赫兹相控阵雷达芯片、雷达算法芯片

低轨卫星与5/6G毫米波通信相控阵收发机芯片

新型模拟射频MoS2芯片设计

高速ADPLL、FMCW-PLL和CDR电路设计

主要学术成果：

发表在包含行业顶级期刊TCAS-I/II和TMTT在内的50+篇论文：

集成电路总结： 2 TMTT ; 1 TCAS-I; 1 TCAS-II;3 RFIC; 1 CICC; 2 A-SSCC; 4 ESSCIRC。

授权13项中国专利

教育背景：

2011年-2016年 复旦大学，微电子学与固体电子学，博士

2007年-2011年 上海交通大学，微电子学与固体电子学，学士

学术经历：

2021年-至今 复旦大学副教授

2018年-2021年 复旦大学，青年副研究员

2017年-2018年 在复旦大学从事博士后工作，主要研究汽车毫米波雷达技术，毫米波成像技术

2016年-2017年 在上海加特兰微电子公司工作，成为公司创始工程师，设计77GHz毫米波汽车雷达产品，主要负责77GHzFMCW锁相环和高性能放大器，已用于77GHz和60GHz量产芯片中。

2012年-2014年 在新加坡南洋理工VIRTUS LAB 工作，主要从事60GHz通信芯片设计

已发表期刊论文：

[1] Z. Xu, B. Hu, T. Wu, Y. Yao, Y. Chen, J. Ren, S. Ma, “A 12-Bit 50 MS/s Split-CDAC-Based SAR ADC Integrating Input Programmable Gain Amplifier and Reference Voltage Buffer,” Electronics, vol. 11, no. 12, p. 1841, Jun. 2022.

[2] T. Wu, Z. Cao, Z. Xu, L. Dai, W. Mao, J. He, S. Ma, H. Yu, A 130-to-220-GHz Frequency Quadrupler with 80 dB Dynamic Range for 6G Communication in 0.13-μm SiGe Process. Electronics, vol. 11, no. 12, p. 825, Jun. 2022.

[3] T. Wu, X. Wang, Y. Chen, J. Ren, and S. Ma, “A 10MHz-to-50GHz Low-Jitter Multi-Phase Clock Generator for High-Speed Oscilloscope in 0.15-µm GaAs Technology,” Int. J. Circuit Theory Appl. (IJCTA)，vol. 50, no. 2, pp. 367-381, Feb. 2022.

[4] Y. Mao, T. Wu, Y. Chen, and S. Ma, “A 0.2-Terahertz Ceramic Relic Detection System Based on Iterative Threshold Filtering Imaging and Neural Network,” Electronics, vol. 10, no. 18, p. 2213, Sep. 2021.

[5] T. Wu, J. Wei, H. Liu, S. Ma, Y. Chen, and J. Ren, “A Sub-6G SP32T Single-Chip Switch with Nanosecond Switching Speed for 5G Applications in 0.25 μm GaAs Technology,” Electronics, vol. 10, no. 12, p. 1482, Jun. 2021.

[6] S. Ma, T. Wu, X. Chen, Y. Wang, H. Tang, Y. Yao, Y. Wang, Z. Zhu, J. Deng, J. Wan, Y. Lu, Z. Sun, Z. Xu, A. Riaud, C. Wu, D. W. Zhang, Y. Chai, P. Zhou, J. Ren, W. Bao, “An artificial neural network chip based on two-dimensional semiconductor,” Sci. Bull., vol. 67, no. 3, pp. 270-277, 15 Feb. 2022.

[7] C. Ma, S. Ma, L. Dai, Q. Zhang, H. Wang and H. Yu, “Wideband and High-Gain D-Band Antennas for Next-Generation Short-Distance Wireless Communication Chips,” IEEE Trans. Antennas Propag., vol. 69, no. 7, pp. 3700-3708, July 2021.

[8] D. Wei et al., “Analysis and Design of a 35-GHz Hybrid π-Network High-Gain Phase Shifter With 360° Continuous Phase Shifting,” IEEE Access, vol. 9, pp. 11943-11953, 2021.

[9] S. Ma, T. Wu, J. Zhang and J. Ren, “A 5G Wireless Event-Driven Sensor Chip for Online Power-Line Disturbances Detecting Network in 0.25 μm GaAs Process,” IEEE Trans. Ind. Electron., vol. 68, no. 6, pp. 5271-5280, June 2021.

[10] J. Zhang, T. Wu, L. Nie, S. Ma, Y. Chen and J. Ren, “A 120–150 GHz Power Amplifier in 28-nm CMOS Achieving 21.9-dB Gain and 11.8-dBm Psat for Sub-THz Imaging System,” IEEE Access, vol. 9, pp. 74752-74762, 2021.

[11] M. Li et al., “A 6.94-fJ/Conversion-Step 12-bit 100-MS/s Asynchronous SAR ADC Exploiting Split-CDAC in 65-nm CMOS,” IEEE Access, vol. 9, pp. 77545-77554, 2021.

[12] S. Ma, T. Wu and J. Ren, “A Quadrature PLL With Phase Mismatch Calibration for 32GS/s Time-Interleaved ADC,” IEEE Access, vol. 8, pp. 219695-219708, 2020.

[13] S. Ma et al., “Analog Integrated Circuits Based on Wafer-Level Two-Dimensional MoS2 Materials With Physical and SPICE Model,” IEEE Access, vol. 8, pp. 197287-197299, 2020.

[14] S. Ma, H. Yu, Q. J. Gu and J. Ren, “A 5-10-Gb/s 12.5-mW Source Synchronous I/O Interface With 3-D Flip Chip Package,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 66, no. 2, pp. 555-568, Feb. 2019.

[15] S. Ma, N. Li and J. Ren, “A 5-to-8-GHz Wideband Miniaturized Dielectric Spectroscopy Chip With I/Q Mismatch Calibration in 65-nm CMOS,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 26, no. 8, pp. 1554-1564, Aug. 2018.

[16] S. Ma, H. Yu, Q. J. Gu and J. Ren, “A 7.52-dB Noise Figure 128.75–132.25-GHz Super-Regenerative Receiver With 0.615-fW√HzNEP by Coupled Oscillator Networks for Portable Imaging System in 65-nm CMOS,” IEEE Trans. Microw. Theory Techn., vol. 66, no. 9, pp. 4095-4107, Sept. 2018.

[17] S. Ma, H. Yu and J. Ren, “A 32.5-GS/s Sampler With Time-Interleaved Track-and-Hold Amplifier in 65-nm CMOS,” IEEE Trans. Microw. Theory Techn., vol. 62, no. 12, pp. 3500-3511, Sep. 2014.

已发表会议论文：

[1] D. Wei, T. Wu, S. Ma, and J. Ren, “A 35-to-50 GHz CMOS Low-Noise Amplifier with 22.2% -1-dB Fractional Bandwidth and 30.5-dB Maximum Gain for 5G New Radio,” in Proc. Eur. Solid State Circuits Conf. (ESSCIRC), Grenoble, France, Sep. 6-9, 2021.

[2] S. Ma, T. Wu, J. Zhang and J. Ren, “A 151-to-173 GHz FMCW Transmitter Achieving 14 dBm Psat with synchronized Injection-Locked Power Amplifiers and Five in-Phase Power Combining Doublers in 65nm CMOS,” in Proc. IEEE Radio Freq. Integr. Circuits Symp. (RFIC), Philadelphia, PA, USA, June 2018, pp. 268-271.

[3] S. Ma, J. Zhang, T. Wu and J. Ren, “A 35 GHz mm-Wave Pulse Radar with Pulse Width Modulated by SDM Realizing Sub-mm Resolution for 3D Imaging System,” in Proc. IEEE Radio Freq. Integr. Circuits Symp. (RFIC), Philadelphia, PA, USA, June 2018, pp. 261-263.

[4] J. Zhang, T. Wu, L. Nie, S. Ma, Y. Chen, J. Ren, “A 3-to-78GHz Differential Distributed Amplifier with Ultra-Balanced Active Balun and Gain Boosting Techniques in 65-nm CMOS Process,” in Proc. IEEE Asian Solid-State Circuits Conf. (A-SSCC), Busan, Korea (South), Nov. 2021, pp. 1-3.

[5] S. Ma, J. Sheng, N. Li and J. Ren, “A 7GHz-bandwidth 31.5 GHz FMCW-PLL with novel twin-VCOs structure in 65nm CMOS,” in Proc. IEEE Asian Solid-State Circuits Conf. (A-SSCC), Seoul, Korea (South), Nov. 2017, pp. 321-324.

[6] D. Wei et al., “A 35 GHz Hybrid π-Network High-Gain Phase Shifter with 360° Continuous Phase Shift Range,” in IEEE MTT-S Int. Microw. Symp. Dig, Los Angeles, CA, USA, Aug. 2020, pp. 1311-1314.

[7] J. Zhang, T. Wu, L. Nie, D. Wei, S. Ma and J. Ren, “A 20-30 GHz Compact PHEMT Power Amplifier Using Coupled-Line Based MCCR Matching Technique,” in IEEE MTT-S Int. Microw. Symp. Dig, Los Angeles, CA, USA, Aug. 2020, pp. 956-959.

[8] X. Wang, S. Ma, B. Zhong and J. Ren, “SPICE Modeling and Verification of Wafer-Scale MoS2 Transistors,” in IEEE Int. Conf. on Solid-State & Integr. Circuit Technol. (ICSICT), Kunming, China, Nov. 2020, pp. 1-3.

[9] J. Zhang, L. Nie, S. Ma and J. Ren, “A 10-18 GHz GaN Power Amplifier Based on Asymmetric Magnetically Coupled Resonator,” in IEEE Int. Midwest Symp. on Circuits and Syst. (MWSCAS), Springfield, MA, USA, Aug. 2020, pp. 802-805.

[10] S. Ma, J. Lin, C. Ma and H. Yu, “A 140 GHz Transceiver for $4\times 4$ Beamforming Short-Range Communication in 65nm CMOS,” in IEEE Asia-Pac. Microw. Conf. (APMC), Singapore, Dec. 2019, pp. 1613-1615.

[11] Y. Yao, J. Wei, M. Li, S. Ma, F. Ye and J. Ren, “A 256MHz Analog Baseband Chain with tunable Bandwidth and Gain for UWB Receivers,” in IEEE Int. Conf. on ASIC (ASICON), Chongqing, China, Oct. 2019, pp. 1-4.

[12] T. Wu et al., “A 36–40 GHz VCO with bonding inductors for millimeter wave 5G Communication,” in IEEE Int. Conf. on ASIC (ASICON), Chongqing, China, Oct. 2019, pp. 1-4.

[13] D. Wei, J. Zhang, T. Wu, S. Ma and J. Ren, “A 22-40.5 GHz UWB LNA Design in 0.15um GaAs,” in IEEE Int. Conf. on ASIC (ASICON), Chongqing, China, Oct. 2019, pp. 1-4.

[14] Y. Yao et al., “SPICE Modeling and Simulation of High-Performance Wafer-Scale MoS2 Transistors,” in IEEE Int. Conf. on ASIC (ASICON), Chongqing, China, Oct. 2019, pp. 1-4.

[15] J. Zhang, L. Nie, D. Wei, T. Wu, S. Ma and J. Ren, “A 130–150 GHz Power Amplifier for Millimeter Wave Imaging in 65-nm CMOS,” in IEEE Int. Conf. on ASIC (ASICON), Chongqing, China, Oct. 2019, pp. 1-4.

[16] D. Wei et al., “A 140 GHz, 4 dB Noise-Figure Low-Noise Amplifier Design with the Compensation of Parasitic Capacitance CGS,” in IEEE Int. Midwest Symp. on Circuits and Syst. (MWSCAS), Dallas, TX, USA, Aug. 2019, pp. 299-302.

[17] J. Wei, Y. Yao, L. Luo, S. Ma, F. Ye and J. Ren, “A Novel Nauta Transconductor for Ultra-Wideband gm-C Filter with Temperature Calibration,” in IEEE Int. Symp. on Circuits and Syst. (ISCAS), Sapporo, Japan, May 2019, pp. 1-4.

[18] S. Ma, T. Wu, J. Zhang and J. Ren, “A 151-to-173 GHz FMCW Transmitter Achieving 14 dBm Psatwith synchronized Injection-Locked Power Amplifiers and Five in-Phase Power Combining Doublers in 65nm CMOS,” in IEEE Radio Freq. Integr. Circuits Symp. (RFIC), June 2018, pp. 268-271.

[19] S. Ma, J. Zhang, T. Wu and J. Ren, “A 35 GHz mm-Wave Pulse Radar with Pulse Width Modulated by SDM Realizing Sub-mm Resolution for 3D Imaging System,” in IEEE Radio Freq. Integr. Circuits Symp. (RFIC), June 2018, pp. 261-263.

[20] S. Ma, J. Sheng, N. Li and J. Ren, “A 7GHz-bandwidth 31.5 GHz FMCW-PLL with novel twin-VCOs structure in 65nm CMOS,” in Proc. IEEE Asian Solid-State Circuits Conf., Nov. 2017, pp. 321-324.

[21] S. Ma, G. Zhou, J. Jiang, C. Chen, Y. Chen, F. Ye and J. Ren, “A Quadrature Clock Generator with Calibration for 22~31.4 GS/s Real-time Sampling System,” in Proc. Eur. Solid-State Circuits Conf. (ESSCIRC), Sep. 2015, pp. 136-139.

[22] S. Ma, H. Yu, Y. Shang, W. Meng Lim and J. Ren, “A 131.5GHz, -84dBm Sensitivity Super-regenerative Receiver by Zero- phase-shifter Coupled Oscillator Network in 65nm CMOS,” in Proc. Eur. Solid-State Circuits Conf. (ESSCIRC), Sep. 2014, pp. 187-190.

[23] S. Ma, F. Ye and J. Ren, “A 50–110 GHz Four-Channel Dual Injection Locked Power Amplifier with 36% PAE at 19 dBm PsatUsing Self-Start Technique in 65 nm CMOS Process,” in IEEE MTT-S Int. Microw. Symp. Dig. (IMS), June 2018, pp. 1449-1452.

[24] Q. Li, S. Ma, F. Ye and J. Ren, “A low-Power PGA with DC-Offset Cancellation in 65 nm CMOS process,” in IEEE 13th International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Oct. 2016, pp. 946-948.

[25] S. Ma, S. Manoj, H. Yu, J. Ren and R. Weerasekera, “A 9.8 Gbps, 6.5 mW forwarded-clock receiver with phase interpolator and equalized current sampler in 65 nm CMOS,” in IEEE MTT-S Int. Microw. Symp. Dig. (IMS), May 2015, pp. 1-4.

[26] S. Ma, N. Li, Fan Ye, Q. J. Gu and J. Ren, “A Wideband and Low Power Dual-Band ASK Transceiver for Intra/Inter-Chip Communication,” in IEEE MTT-S Int. Microw. Symp. Dig. (IMS), May 2015, pp. 1-4.

[27] S. Ma, G. Zhou, N. Li, Fan Ye and J. Ren, “60GHz CMOS Coupled Oscillator Network by Zero-Phase-Shifters,” in IEEE 12th International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Oct. 2014, pp. 1-3.

[28] S. Ma, H. Yu and J. Ren, “An Overview of New Design Techniques for High Performance CMOS Millimeter-Wave Circuits,” in IEEE International Symposium on Integrated Circuits, Dec. 2014, pp. 292-295.

[29] S. Ma, J. Wang, H. Yu and J. Ren, “A 32.5-GS/s Two- Channel Time-Interleaved CMOS Sampler with Switched-Source Follower based Track-and-Hold Amplifier,” in IEEE MTT-S Int. Microw. Symp. Dig. (IMS), Jun. 2014, pp. 1-3.

[30] J. Wang, S. Ma, P. D. S. Manoj, M. Yu, R. Weerasekera and H. Yu, “High-speed and low-power 2.5D I/O circuits for memory-logic-integration by through-silicon interposer,” in IEEE International 3D Systems Integration Conference (3DIC), Oct. 2013, pp. 1-4.

[31] S. Ma, W. Fei, H. Yu and J. Ren, “A 75.7GHz to 102GHz Rotary-traveling-wave VCO by Tunable Composite Right /Left Hand T-line,” in Proc. IEEE Custom Integr. Circuits Conf., Sep. 2013, pp. 1-4.

[32] S. Ma, C. Chen, Y. Zhang and J. Ren, “A low power programmable band-pass filter with novel pseudo-resistor for portable biopotential acquisition system,” in Proc. IEEE APCCAS, Jan. 2012, pp. 232-235.

[33] G. Zhou, S. Ma, F. An, N. Li, F. Ye and J. Ren, “A 30-GHz to 39-GHz mm-Wave low-power injection-locked frequency divider in 65nm CMOS,” in IEEE 11th International Conference on ASIC (ASICON), Nov. 2015, pp. 1-4.

[34] Q. Chen, F. An, G. Zhou, S. Ma, F. Ye and J. Ren, “A 39GHz-80GHz Millimeter-Wave Frequency Doubler with Low Power Consumption in 65nm CMOS Technology,” in IEEE International Conference on ASIC (ASICON), Nov. 2015, pp. 1-4.

[35] F. An, S. Ma, Q. Chen, G. Zhou, F. Ye and J. Ren, “A Wide-division-ratio 100MHz-to-5GHz Multi-Modulus Divider Chain for Wide-band,” in IEEE International Conference on ASIC (ASICON), Nov. 2015, pp. 1-4.

[36] X. Liu, S. Ma, M. Yan, J. Ren and H. Yu, “A 5-GS/s, 13-mW, 2-channel time-interleaved asynchronous ADC in 65nm CMOS,” IEEE Int. RFIT, Taipei, 2016, pp. 1-3.

[37] J. Wei, L. Luo, S. Ma, F. Ye and J. Ren, “A High Precision Bandgap Voltage Reference with MOS Transistor Curvature Compensation in 65-nm CMOS Process,” in IEEE 14th International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Nov. 2018, pp. 1-3.

[38] J. Zhang, T. Wu, S. Ma, Q. Hong, F. Ye and J. Ren, “A 8-12 GHz Vector-Sum Phase Shifter Using a Marchand Balun and Gilbert-Cell Structure,” in IEEE 14th International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Nov. 2018, pp. 1-3.

已授权专利：

1.马顺利,吴天祥,许诺,曾超凡. “一种应用于飞行器的无空速管的空速计” ,中国发明专利，专利申请号CN202110184368.8，公告日2021年07月23日。

2.马顺利,曾超凡,吴天祥,许诺. “一种水下航行器水流监测系统” ,中国发明专利，专利申请号CN202110185590.X，公告日2021年06月11日。

3.马顺利,许诺,吴天祥,曾超凡. “一种大气层内飞行器气流监测系统”,中国发明专利，专利申请号CN202110185589.7，公告日2021年06月04日。

4.马顺利; 姚玉婷; 任俊彦，“一种可变增益和带宽的模拟基带电路”,中国发明专利，专利申请号202010577618.X，公告日2020年10月30日。

5.马顺利; 吴天祥; 任俊彦，“一种具有层叠结构的多栅指数晶体管及其制备方法”，中国发明专利，专利申请号202010281186.8，公告日2020年9月1日。

6.马顺利; 任俊彦; 吴天祥; 李宁; 叶凡，“一种应用于毫米波通信系统的频率源”，中国发明专利，专利申请号201910022317.8，公告日2019年5月28日。

7.马顺利; 任俊彦; 魏继鹏; 李宁; 叶凡，“一种应用于毫米波无源成像的高增益接收机”，中国发明专利，专利申请号201910022283.2，公告日2019年5月21日。

8.马顺利;任俊彦;魏继鹏;李宁;叶凡，“应用于5G毫米波基站的CMOS集成电路带隙基准源”，中国发明专利，专利申请号201811616031.4，公告日2019年3月19日。

9.马顺利;任俊彦;章锦程;李宁;叶凡，“应用于5G毫米波基站的四通道相控阵收发机”，中国发明专利，专利申请号201811614591.6，公告日2019年3月15日。

10.马顺利、陈嘉澍，“放大器及其控制方法和信号处理系统”，中国发明专利，专利申请号201710097069.4，公告日2017年7月28日。

11.马顺利、陈嘉澍，“多模分频器及其基本分频单元”，中国发明专利，专利申请号201610886083.8，公告日2017年3月29日。

12.任俊彦、魏东、马顺利、陈汧，“一种应用于太赫兹皮肤成像领域的CMOS集成电路太赫兹检测器”， 中国发明专利，专利申请号CN201610309966.2，公告日2016年10月12日。

13.任俊彦、马顺利、魏东、陈汧，“一种应用于太赫兹皮肤成像领域的CMOS集成电路太赫兹源”， 中国发明专利，专利申请号CN201610318871.7，公告日2016年10月12日。

参与的项目：

1.上海市“科技创新行动计划”自然科学基金面上项目，基于先进CMOS工艺的5G毫米波频段多通道收发机芯片研究，在研，主持

2.国家自然科学基金青年科学基金项目，基于先进CMOS工艺的1-30GHz超宽带N-path滤波器研究，在研，主持

3.中电科24所、36所、50所横向合作，在研，主持

4.国家自然科学基金委员会，重点项目，超宽带CMOS毫米波频谱检测芯片关键技术，在研，参加

5.中华人民共和国科学技术部，国家重点研发计划，全在一芯片集成工艺，在研，参加

6.中华人民共和国科学技术部，国家重点研发计划，高精度毫米波/太赫兹雷达与成像芯片技术，在研，参加

7.国家自然科学基金应急管理项目，适合太赫兹成像的CMOS太赫兹辐射源研究，已结题，参与

8.国家自然科学基金面上项目，适于生态型毫米波系统集成的纳米CMOS频率综合方法研究，已结题，参与

9.浦东新区科技发展基金，面向智能交通的ADAS芯片，已结题，参与