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    王伶俐
    教授 、博士生导师
    电        话:51355336
    研  究  所:
    邮        箱:llwang@fudan.edu.cn
    个人网址:
    办公地址:复旦大学张江校区微电子楼241室
    • 研究方向
    • 教育背景
    • 学术经历
    • 荣誉称号
  • 研究方向:

    FPGA结构与应用加速

    集成电路设计与EDA算法

    可重构计算

    量子计算

     

    教育背景

    英国爱丁堡Napier大学,电子工程,博士

     

    学术经历

    200504至今复旦大学,副教授/教授

    200102-200504 Altera欧洲研发中心,工程师/高级工程师

    199804-200102 英国爱丁堡Napier大学,博士研究生

    199409-199707 浙江大学,硕士研究生

     

    荣誉称号:

    浦江人才,2008


    科研获奖:

    获上海市技术发明三等奖,复杂计算的高效安全可编程结构与可重构系统,(第一完成人),2014

    获教育部科技进步二等奖,适用于数据通路应用的可编程逻辑器件及其软件系统,(第三完成人),2007


    教学获奖:

    本科生选修课程“FPGA结构原理和应用获复旦大学优秀全英语课程,2016年。


    课程与教材:

    本科生全英语选修课程“FPGA 结构原理和应用(Principle of FPGA Architecture and Its Applications”, 课程代码:INFO130115.01, 开课学期:春季。学分:2

    研究生学位专业课程系统级可编程芯片设计, 课程代码:INFO630047,开课学期:秋季。学分:3

    研究生专业选修课程可编程逻辑器件原理和CAD”, 课程代码:INFO820024,开课学期:春季。学分:3

    研究生专业选修课程数字集成电路设计中的高级综合技术, 课程代码:INFO830024,开课学期:秋季。学分:3

    中国工程院国际工程科技发展战略高端论坛,《高效能计算机体系结构的挑战、对策与前景展望》,高等教育出版社,201312月(担任编辑委员会委员)。

    王伶俐,周学功,王颖,系统级FPGA设计与应用,清华大学出版社,20121月。

    王伶俐,《集成电路工程领域发展报告》之专题9“FPGA技术发展趋势,浙江大学出版社,20119月。

    王伶俐,杨萌,周学功,深亚微米FPGA结构与CAD设计, 电子工业出版社,200811月。


    主要项目:

    2024年度浦东新区科技发展基金产学研专项(电子信息),基于OpenFPGA开源项目设计优化嵌入式FPGA IP2024.7-2026.6

    科技部科技创新2030--新一代人工智能重大项目人工智能辅助的先进工艺数字集成电路EDA关键技术及工具研究课题一基于机器学习的综合与映射算法研究”(2021ZD0114701), 2022.6-2026.5

    国家自然科学基金面上项目,多模态张量DNN及其FGRA芯片结构协同设计方法研究(62174035)2022.1-2025.12

    国家自然科学基金面上项目,量子深度神经网络的设计与优化 61971143 ),2020.1-2023.12

    国家蛋白质组研究中心,“面向FPGA加速的X!Tandem搜库引擎并行化加速2016.8–2018.7

    上海金融期货信息技术有限公司,“会员端服务FPGA重构可行性研究2015.3–2015.8

    国家自然科学基金国际(地区)合作与交流项目,第13IEEE现场可编程技术国际会议(FPT2014)2014.9-2014.12

    国家863计划重点项目新概念高效能计算机体系结构及系统研究开发子课题,面向图像识别的HRCA设计与实现2011.12-2013.9

    国家自然科学基金重点项目基于双逻辑的低功耗IP核设计基础理论与关键技术子课题基于双逻辑IP核的验证和测试平台61131001),子课题负责人,2012.1-2016.12

    国家自然科学基金面上项目,量子可编程逻辑阵列结构研究61171011),2012.1-2015.12

    上海市科委白玉兰人才基金,三维FPGA的热分析模型研究2009.5–2010.5

    国家863计划重点项目新概念高效能计算机体系结构及系统研究开发子课题,非冯体系结构研究2009.9-2010.1

    国家863计划重点项目新概念高效能计算机体系结构及系统研究开发子课题,纳米尺度SoC精化设计与验证技术研究2009.9-2010.5

    核高基国家科技重大专项项目,嵌入式可编程逻辑阵列IP, 软件子课题负责人,2009.1-2011.6

    Canada-China Scientific and Technological Cooperation(中国国际人才交流协会和加拿大科学技术合作中心),Organization of International Workshop on Emerging Circuits and Systems,2009.8-2011.8

    Sino-Swiss Science and Technology Cooperation 2008-2011(中瑞科技合作计划)“Programmability Implementation Using Plasmonics Based on the MBQC Framework”2009.8–2010.9

    上海市科技创新行动计划集成电路设计专项,国产自主知识产权FPGA的产业化应用和深入研发, 负责FPGA软件系统的开发,2008.10-2010.9

    上海市浦江人才项目,抗辐射FPGA硬件电路与软件优化算法研究2008.9-2010.9

    教育部留学回国人员科研启动基金,量子计算电路的设计和优化2008.3

    国家自然科学基金面上项目,量子计算电路的设计和综合2007.1-2009.12

    智锐电子系统设计(上海)有限公司,面向可重构计算的FPGA软件算法开发2006.10–2007.3

    美国Synopsys公司,“FPGA芯片设计和软件系统,负责FPGA软件系统的开发,2005.2–2007.2


    指导本科生申请的项目:

    1)国家大学生创新训练计划二类项目:“FPGA时序收敛和码点调试工具2007.5-2008.5

    2)复旦大学本科生学术研究资助计划(FDUROP)曦源项目,量子遗传算法在FPGA布局中的应用 2009

    3)复旦大学本科生学术研究资助计划(FDUROP)望道项目,基于纳米级工艺FPGALUT尺度优化研究2010

    4)复旦大学推免生暑期科研训练资助计划,新型可编程互连结构探索2010

    5)复旦大学学生学术科技创新行动支持计划自然科学B2类,一款基于QtFPGA图形显示与调试工具2012

    6)复旦大学推免生暑期科研训练资助计划,基于量子模型的FPGA并行布局“SOPC的部分位流生成2013

    7)复旦大学本科生学术研究资助计划(FDUROP)望道项目,“HRCA计算单元控制模块设计2013

    8)复旦大学学生学术科技创新行动支持计划自然科学B2类,一款基于QtFPGA图形显示与调试工具2013

    9)复旦大学本科生学术研究资助计划(FDUROP)望道项目,“HRCA计算单元控制模块设计2013

    10)复旦大学学生学术科技创新行动支持计划自然科学B2类,基于图像的空间识别算法2014

    11)复旦大学本科生学术研究资助计划(FDUROP)曦源项目,面向高清视频的高速多目标检测与跟踪电路设计2014

    12)复旦大学本科生学术研究资助计划(FDUROP)曦源项目,面向金融时间序列的异常检测算法研究及其FPGA实现2016

    13)复旦大学本科生学术研究资助计划(FDUROP)曦源项目,高层次综合在机器学习算法领域的研究与实现2016

    14)复旦大学本科生学术研究资助计划(FDUROP)曦源项目,“FPGA布局布线后的仿真验证2016

    15)复旦大学本科生学术研究资助计划(FDUROP)曦源项目,基于ORB算法的全景拼接技术研究及其FPGA实现2017

    16)复旦大学本科生学术研究资助计划(FDUROP)曦源项目,基于SoC FPGA的图像拼接APAP算法的硬件加速2017

    17)复旦大学本科生学术研究资助计划(FDUROP)曦源项目,量子神经网络结构研究2017

    18)复旦大学本科生学术研究资助计划(FDUROP)望道项目,基于开关信号代数系统的晶体管级电路设计优化与验证2019

    19)复旦大学本科生学术研究资助计划(FDUROP)曦源项目,基于神经网络的可见光与红外光图像的合成2021

    20)复旦大学本科生学术研究资助计划(FDUROP)登辉项目,针对自主设计FPGA芯片的AI-EDA软件前端设计及虚拟器件的图形界面开发2022

    21) 复旦大学本科生学术研究资助计划(FDUROP)曦源项目,带组合逻辑环的CGRA 性能与面积协同优化2023

    22) 复旦大学本科生学术研究资助计划(FDUROP)望道项目, 基于AI模型的RISC-VCGRASoC设计空间探索与优化”,2024

    23) 复旦大学本科生学术研究资助计划(FDUROP)䇹政项目, 面向高效数据流加速器的MLIR高层综合框架设计”,2024

    24) 复旦大学本科生学术研究资助计划(FDUROP)曦源项目, 基于多层中间表示的AI模型通用量化方法”,2024


    主要论文-Publications

      (Download: https://pan.baidu.com/s/1bVTz2r35S1Gx9-la-2RK0w , code: 86q4)

    [1] 王伶俐,陈偕雄,不完全确定序列机状态化简,电路与系统学报,Vol.1No.3, pp.72-76, 1996

    [2] 范雅俊,王伶俐,陈偕雄,基于多值模相关性的电流型CMOS电路设计,电路与系统学报,Vol.3, No.2, pp.43-49, 1998

    [3] 王伶俐, Xinmin Xu, Xiexiong Chen, 基于模运算模为合数的多值逻辑函数的展开, 电子科学学刊, Vol.20, No.1, 120-124, 1998

    [4] 王伶俐, Xiexiong Chen, and Xunwei Wu, 模为合数时多值模代数的模减与模除运算, 电子学报, Vol.26, No.5, 17-20, 1998

    [5] L. Wang, X. Chen, and A. E. A. Almaini, Modulo Correlativity and its Application in a Multiple Valued Logic System, International J. Electronics, Vol.85, No.5, 561-570, 1998

    [6] L. Wang, X. Chen, and A. E. A. Almaini, Algebraic Properties of Multiple-Valued Modulo Systems and Their Applications to Current-Mode CMOS Circuits, IEE Proceedings Computers and Digital Techniques, Vol.145, No.5, 364-368, 1998

    [7] L. Wang, A. E. A. Almaini, and A. Bystrov, Efficient Polarity Conversion for Large Boolean Functions, IEE Proceedings Computers and Digital Techniques, Vol.146, No.4, 197-204, 1999

    [8] 王伶俐, L, Song, G. Wu, Xiexiong, Chen, 基于双向电流型CMOS电路的谱综合, 电子科学学刊, Vol.22, No.2, 310-315, 2000

    [9] L. Wang, A. E. A. Almaini, Fast Conversion Algorithm for Very Large Boolean Functions, IEE Electronics Letters, Vol.36, No.16, 1370-1371, 2000

    [10] X. Wu, M. Pedram, and L. Wang, Multi-Code State Assignment for Low Power Sequential Circuit Design, IEE Proceedings Circuits, Devices and Systems, Vol.147, No.5, 271-275, 2000

    [11] L. Wang and A. E. A. Almaini, Multilevel Logic Minimization Using Functional Don't Cares, 14th International Conference on VLSI Design, IEEE Computer Society, Bangalore, India, 417-424, 2001

    [12] L. Wang and A. E. A. Almaini, Optimisation of Reed-Muller PLA Implementations, IEE Proceedings Circuits, Devices and Systems, Vol.149, No.2, 119-128, 2002

    [13] L. Wang and A. E. A. Almaini, Exact Minimisation of Large Multiple Output FPRM Functions, IEE Proceedings Computers and Digital Techniques, Vol.149, No.5, 203-212, 2002

    [14] L. Wang, and A. E. A. Almaini, Multilevel Logic Simplification Based on Containment Recursive Paradigm, IEE Proceedings Computers and Digital Techniques, Vol.150, No.4, 218-226, 2003

    [15] 胡云,王伶俐,唐璞山,童家榕, 基于布通率的FPGA装箱算法,计算机辅助设计与图形学学报,Vol.19, No.1, pp.108-113, 2007

    [16] Guang-Xi Hu, Ran Liu, Ting-Ao Tang, Shi-Jin Ding, and Ling-Li Wang, Theory of Short-Channel Surrounding-Gate Metal-Oxide-Semiconductor Field-Effect-Transistors, Japanese Journal of Applied Physics, Vol. 46, No. 4A, pp. 1437-14402007

    [17] 胡云,王伶俐,唐璞山,童家榕, 基于概率增益的电路划分算法,电子与信息学报,Vol.29No.11, pp.2762-2766, 2007

    [18] M. Yang, L. Wang, J. R. Tong, A.E.A. Almaini, Techniques for Dual Forms of Reed-Muller Expansion Conversion, Integration, the VLSI Journal, Vol. 41, No. 1, pp.113-122, 2008

    [19] 谈珺, 申秋实,王伶俐,童家榕, FPGA通用开关盒层次化建模与优化, 电子与信息学报, 30卷,第5, pp.1239-1242, 2008

    [20] Guang-Xi Hu, Ran Liu, Ting-Ao Tang, and Ling-Li Wang, Analytic Investigation on Threshold Voltage of Fully-depleted Surrounding-Gate Metal-Oxide-Semiconductor Field-Effect-Transistors, Journal of the Korean Physical Society, Vol. 52, No. 6, pp.1909–1912, 2008

    [21] Jia-Lin Chen, Edoardo Charbon, Lingli Wang, Wen-Qing Zhao, Quantum Gate Array Architecture Design Using Photons, International Conference on Quantum Foundation and Technology (ICQFT’09), 2009

    [22] 汪鹏君,李辉,吴文晋,王伶俐, 张小颖,戴静,量子遗传算法在多输出Reed-Muller逻辑电路最佳极性搜索中的应用,电子学报,Vol.38, No.5, pp.1058-1063, 2010

    [23] 龚爱慧,梁绍池,陈志辉,王伶俐,童家榕, CSPack:采用CSP图匹配的新型装箱算法, 计算机辅助设计与图形学学报, Vol.22, No.11, pp.1998-2003, 2010

    [24] HU Guang-Xi, WANG Lingli, LIU Ran, TANG Ting-Ao, Quantum-Mechanical Study on Surrounding-Gate Metal-Oxide-Semiconductor Field-Effect Transistors, Commun. Theor. Phys., Chinese Physical Society, pp. 763-767, Vol. 54, No. 4, 2010

    [25] C. Zhang, Y. Hu, L. Wang, J. Tong and L. He, Building A Faster Boolean Matcher Using Bloom Filter, 18th ACM International Symposium on Field Programmable Gate Arrays, pp.185-188, Feb. 2010

    [26] C. Zhang, Y. Hu, L. Wang, J. Tong and L. He, Engineering a Scalable Boolean Matching Based on EDA SaaS 2.0, International Conference on Computer-Aided Design (ICCAD), San Jose, CA., pp. 750-755, 2010

    [27] Chun Zhang, Yu Hu, Lingli Wang, Lei He, and Jiarong Tong, Accelerating Boolean Matching Using Bloom FilterIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol.E93-A, No.10, pp.1775-1781, 2010

    [28] Chun Zhang, Lerong Cheng, Lingli Wang, Jiarong Tong, FPGA power and timing optimization: architecture, process, and CAD, International Conference on Computational Problem-Solving (ICCP), Invited Talkpp.350-354, 2010

    [29] Kejie Ma, Lingli Wang, Xuegong Zhou, Sheldon X.-D.Tan, Jiarong Tong, General Switch Box Modeling and Optimization for FPGA Routing Architectures, International Conference on Field-Programmable Technology (FPT2010), pp.320-323, 2010

    [30] Kanwen Wang, Jialin Chen, Wei Cao, Ying Wang, Lingli Wang, Jiarong Tong, A Reconfigurable Multi-Transform VLSI Architecture Supporting Video Codec DesignIEEE Transactions on Circuits and Systems-II: Express Briefs, Vol. 58, No. 7, pp.432-436, 2011

    [31] 陈志辉, 章淳, 王颖, 王伶俐, 一种FPGA抗辐射工艺映射方法研究, 电子学报, Vol.39, No.11, pp.2507-2512, 2011

    [32] Ying Wang, Jian Yan, Xuegong Zhou, Lingli Wang, Wayne Luk, Chenglian Peng, Jiarong Tong, A Partially Reconfigurable Architecture Supporting Hardware Threads (Best Paper Nomination, 最佳论文提名), IEEE International Conference on Field-Programmable Technology (FPT2012), pp.269-276, 2012

    [33] W. Yang, L. Wang, and A. Mishchenko, LMS: A new logic synthesis method based on pre-computed library, International Workshop on Logic Synthesis (IWLS), pp. 1-9, 2012

    [34] Wenlong Yang, Lingli Wang, and Alan Mishchenko, Lazy Man’s Logic Synthesis, International Conference on Computer-Aided Design (ICCAD), pp.597-604, 2012

    [35] Zheng Huang, Lingli Wang, Yakov Nasikovskiy, Alan Mishchenko, Fast Boolean Matching for Small Practical Functions, International Workshop on Logic Synthesis (IWLS), pp.30-36, 2013

    [36] Guangxi Hu, Shuyan Hu, Ran Liu, Lingli Wang, Xing Zhou, Ting-Ao Tang, Quasi-Ballistic Transport Model for Graphene Field-Effect Transistor, IEEE Transactions on Electron Devices, Vol. 60, No. 7, p 2410-2414, 2013

    [37] Ying Wang, Xuegong Zhou, Lingli Wang, Jian Yan, Wayne Luk, Chenglian Peng and Jiarong Tong, SPREAD: A Streaming-based Partially Reconfigurable Architecture and Programming Model, IEEE Transactions on Very Large Scale Integration Systems, Vol.21, No.12, pp. 2179-2192, 2013

    [38] Jialin Chen, Lingli Wang, Edoardo Charbon, and Bin Wang, Programmable Architecture for Quantum Computing, Physical Review A (88), 022311, 2013

    [39] Chen Liang, Chenlu Wu, Xuegong Zhou, Wei Cao, Shengye Wang and Lingli Wang, An FPGA-Cluster-Accelerated Match Engine for Content-based Image Retrieval, IEEE International Conference on Field-Programmable Technology (ICFPT), pp.422-425, 2013

    [40] Shengye Wang, Chen Liang, Xuegong Zhou, Wei Cao, Chenlu Wu, Xitian Fan and Lingli Wang, A Hardware Implementation of Bag of Words and Simhash for Image Recognition, IEEE International Conference on Field-Programmable Technology (FPT2013), pp.418-421, 2013

    [41] Jialin Chen, Lingli Wang and Bin Wang, Quantum FPGA Architecture Design, IEEE International Conference on Field-Programmable Technology (FPT2013), pp. 354-357, 2013

    [42] Zheng Huang, Lingli Wang, Yakov Nasikovskiy and Alan Mishchenko, Fast Boolean Matching Based on NPN Classification, IEEE International Conference on Field-Programmable Technology (FPT2013), pp. 310-313, 2013

    [43] Xitian Fan, Chenlu Wu, Wei Cao, Xuegong Zhou, Shengye Wang and Lingli Wang, Implementation of High Performance Hardware Architecture of OpenSURF Algorithm on FPGA, IEEE International Conference on Field-Programmable Technology (FPT2013), pp.152-159, 2013

    [44] Chaofan Yu, Lingli Wang, Chun Zhang, Yu Hu, Lei He, Fast Filter-Based Boolean Matchers, IEEE Embedded Systems Letters, Vol. 5, No. 4, pp. 65-68, December 2013

    [45] Hu, Guangxi; Xiang, Ping; Ding, Zhihao; Liu, Ran; Wang, Lingli; Tang, Ting-Ao, Analytical Models for Electric Potential, Threshold Voltage, and Subthreshold Swing of Junctionless Surrounding-Gate Transistors, IEEE Transactions on Electron Devices, Vol.61, No.3, pp.688-695, 2014

    [46] Jiasen Huang, Junyan Ren, Wenbo Yin and Lingli Wang, anNo Zero Padded Sparse Matrix-Vector Multiplication on FPGAs, IEEE International Conference on Field-Programmable Technology (FPT2014), pp.290-291, 2014

    [47] Jian Yan, Junqi Yuan, Ying Wang, Philip Leong and Lingli Wang, Design Space Exploration for FPGA-based Hybrid Multicore Architecture, IEEE International Conference on Field-Programmable Technology (FPT2014), pp.280-281, 2014

    [48] Jian Yan, Jifang Jin, Ying Wang, Xuegong Zhou, Philip Leong and Lingli Wang, UniStream: A Unified Stream Architecture Combining Configuration and Data Processing, Field-Programmable Logic and Applications (FPL2015), London, 2015

    [49] Jifang Jin, Jian Yan, Xuegong Zhou and Lingli Wang, An Adaptive Cross-Layer Fault Recovery Solution for Reconfigurable SoCs, IEEE International Conference on Field-Programmable Technology (FPT2015), pp. 188-191, Queenstown, 2015

    [50] Huimin Li, Xitian Fan, Li Jiao, Wei Cao, Xuegong Zhou, Lingli Wang, A High Performance FPGA-based Accelerator for Large-Scale Convolutional Neural Networks, Field-Programmable Logic and Applications (FPL2016), Lausanne, pp. 69-77, 2016

    [51] Xitian Fan, Huimin Li, Wei Cao, Lingli Wang, DT-CGRA: Dual-Track Coarse-Grained Reconfigurable Architecture for Stream Applications, Field-Programmable Logic and Applications (FPL2016), Lausanne, pp.78-86, 2016

    [52] Hao Zhou, Xinyu Niu, Junqi Yuan, Lingli Wang, Wayne Luk, Connect On the Fly: Enhancing and Prototyping of Cycle-Reconfigurable Modules, Field-Programmable Logic and Applications (FPL2016), Lausanne, pp.233-240, 2016

    [53] Wei Liang, Wenbo Yin, Ping Kang, Lingli Wang, Memory Efficient and High Performance Key-value Store on FPGA Using Cuckoo Hashing, Field-Programmable Logic and Applications (FPL2016), Lausanne, pp.379-382, 2016

    [54] Zhehao Li, Jifang Jin, Ji Yang, Jiahua Lu, Lingli Wang, A Moving Object Extraction and Classification System based on Zynq and IBM SuperVessel, IEEE International Conference on Field-Programmable Technology (FPT2016), pp.303- 306, 2016

    [55] Qi Zhan, Min Gao, Li Jiao, Shiwen Wang, Xitian Fan, Wei Cao, Xuegong Zhou and Lingli Wang, High Performance Deformable Part Model Accelerator Based on FPGA, IEEE International Conference on Field-Programmable Technology (FPT2016), pp.241- 244, 2016

    [56] Li Ding, Kang Ping, Wenbo Yin and LingLi Wang, Hardware TCP Offload Engine based on 10-Gbps Ethernet for Low-Latency Network Communication, IEEE International Conference on Field-Programmable Technology (FPT2016), pp.265- 268, 2016

    [57] Jian Yan, Junqi Yuan, Philip H. W. Leong, Wayne Luk, and Lingli Wang, Lossless Compression Decoders for Bitstreams and Software Binaries Based on High-Level Synthesis, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 25, No.10, pp. 2842-2855, 2017

    [58] Jin Qiu, Ping Kang, Li Ding, Yipeng Yuan, Wenbo Yin, Lingli Wang, FPGA Acceleration of the Scoring Process of X!TANDEM for Protein Identification, International Conference on Field-Programmable Logic and Applications (FPL2017), Belgium, 2017

    [59] Li Jiao, Cheng Luo, Wei Cao, Xuegong Zhou, Lingli Wang, Accelerating Low Bit-Width Convolutional Neural Networks with Embedded FPGA, International Conference on Field-Programmable Logic and Applications (FPL2017), Belgium, 2017

    [60] Jialin Chen, Lingli Wang and Edoardo Charbon, A quantum-implementable neural network model, Quantum Information Processing, 16: 245, 2017

    [61] Moucheng Yang, Jifang Jin, Zhehao Li, Xuegong Zhou, Shaojun Wang and Lingli Wang, A Scalable Hybrid Architecture for High Performance Data-Parallel Applications, International Conference on Field-Programmable Technology (FPT 2017), pp. 191-194, Melbone, 2017

    [62] Junqi Yuan; Lingli Wang; Xuegong Zhou; Yinshui Xia; Jianping Hu, RBSA:Range-based Simulated Annealing for FPGA Placement (Best Paper Nomination, 最佳论文提名), IEEE International Conference on Field-Programmable Technology (FPT2017), Melbone, 2017

    [63] Li Ding, Wenbo Yin and Lingli Wang, fasUltra-Low Latency and High Throughput Key-Value Store Systems Over Ethernet, International Symposium on Circuits and Systems (ISCAS), Florence, 2018

    [64] Xitian Fan, Di Wu, Wei Cao, Wayne Luk, Lingli Wang, Stream Processing Dual-Track CGRA for Object Inference, IEEE Transactions on Very Large Scale Integration Systems, Vol.26, No.6, pp.1098-1111, 2018

    [65] Di Wu, Jin Chen, Lingli Wang and Wei Cao, A Novel Low-Communication Energy-Efficient Reconfigurable CNN Acceleration Architecture for Embedded Systems, International Conference on Field-Programmable Logic and Applications (FPL2018), Dublin, pp.64-67, 2018

    [66] Cheng Luo, Yuhua Wang, Wei Cao, Philip Leong and Lingli Wang, RNA: An Accurate Residual Network Accelerator for Quantized and Reconstructed Deep Neural Networks, International Conference on Field-Programmable Logic and Applications (FPL2018), Dublin, pp.60-63, 2018

    [67] Xuegong Zhou, Lingli Wang, Peiyi Zhao, Alan Mishchenko, Fast Adjustable NPN Classification Using Generalized Symmetries (Best Paper Nomination, 最佳论文提名), International Conference on Field-Programmable Logic and Applications (FPL2018), Dublin, 2018

    [68] Yunhui Qiu, Hankun Lv, Jinyu Xie, Wenbo Yultrahighin and Lingli Wang, Ultra-Low-Latency and Flexible In-Memory Key-Value Store System Design on CPU-FPGA, IEEE International Conference on Field-Programmable Technology (FPT2018), pp.277-280, 2018

    [69] Liang Xie, Xitian Fan, Wei Cao, and Lingli Wang, High Throughput CNN Accelerator Design Based on FPGA, IEEE International Conference on Field-Programmable Technology (FPT2018), pp.145-152, 2018

    [70] Junqi Yuan, Jialing Chen, Lingli Wang, Xuegong Zhou, Yinshui Xia, Jianping Hu, ARBSA: Adaptive Range-Based Simulated Annealing for FPGA Placement, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol.38, No.12, pp.2330-2342, 2019

    [71] 陈佳临,王伶俐,量子并行神经网络,计算机学报,Vol.42, No.6, pp.1205-1217, 2019

    [72] Cheng Luo, Wei Cao, Lingli Wang, and Philip Leong, RNA: An Accurate Residual Network Accelerator for Quantized and Reconstructed Deep Neural Networks, IEICE Transactions on Information and Systems, Vol. E102-D, No. 5, pp.1037-1045, 2019

    [73] Xibo Sun, Hao Zhou, Lingli Wang, Bent Routing Pattern for FPGA, 29th International Conference on Field Programmable Logic and Applications (FPL2019), pp.9-16, 2019

    [74] Yuchen Ren, Jinyu Xie, Yunhui Qiu, Hankun Lv, Wenbo Yin, Lingli Wang, Bowei Yu, Hua Chen, Xianjun He, Zhijian Liao, Xiaozhong Shi, A Low-Latency Multi-Version Key-Value Store Using B-Tree on an FPGA-CPU Platform, 29th International Conference on Field Programmable Logic and Applications (FPL2019), pp.321-325, 2019

    [75] Su Zheng, Jialin Chen, Lingli Wang, Targeted Black-Box Adversarial Attack Method for Image Classification Models, International Joint Conference on Neural Networks (IJCNN), pp.1-8, 2019

    [76] S. Rasoulinezhad, Hao Zhou, Lingli Wang and P. Leong, PIR-DSP: An FPGA DSP-block Architecture for Multi-Precision Deep Neural Networks, 27th IEEE International Symposium On Field-Programmable Custom Computing Machines (FCCM), San Diego, CA, pp.35-44, 2019

    [77] Xuegong Zhou, Lingli Wang, Alan Mishchenko, Fast Adjustable NPN Classification Using Generalized Symmetries, ACM Trans. on Reconfig. Tech. & Sys. Vol.12, No.2, pp.7:1-16, 2019

    [78] Seyedramin Rasoulinezhad, Sean Fox, Hao Zhou, Lingli Wang, David Boland and Philip H. W. Leong, MajorityNets: BNNs Utilising Approximate Popcount for Improved Efficiency, IEEE International Conference on Field-Programmable Technology (FPT2019), Tianjin, pp.339-342, 2019

    [79] Moucheng Yang, Tao Chen, Xuegong Zhou, Liang Zhao, Yunping Zhu and LingliWang, A Complete CPU-FPGA Architecture for Protein Identification with Tandem Mass Spectrometry, IEEE International Conference on Field-Programmable Technology (FPT2019), Tianjin, pp.295-298, 2019

    [80] Di Wu, Wei Cao and LingliWang, SpWMM: A High-Performance Sparse-Winograd Matrix-Matrix Multiplication Accelerator for CNNs, IEEE International Conference on Field-Programmable Technology (FPT2019), Tianjin, pp.255-258, 2019

    [81] JinyuXie, YunhuiQiu, Wenbo Yin and Lingli Wang, High-Throughput and Low-Latency Distributed Management Proxy for Key-Value Store Over 100Gbps Ethernet on FPGA, IEEE International Conference on Field-Programmable Technology (FPT2019), Tianjin, pp.224-230, 2019

    [82] Mingjun Jiao, Yue Li, Pengbo Dang, Wei Cao and Lingli Wang, A High Performance FPGA-Based Accelerator Design for End-to-End Speaker Recognition System, IEEE International Conference on Field-Programmable Technology (FPT2019), Tianjin, pp.215-223, 2019

    [83] Xuegong Zhou, Lingli Wang, Alan Mishchenko, Fast Exact NPN Classification by Co-Designing Canonical Form and Its Computation Algorithm, IEEE Transactions on Computers, Vol.69, No.9, pp.1293-1307, 2020

    [84] Yunhui Qiu, Jinyu Xie, Hankun Lv, Wenbo Yin, Wai-Shing Luk, Lingli Wang, Bowei Yu, Hua Chen, Xianjun Ge, Zhijian Liao, Xiaozhong Shi, FULL-KV: Flexible and Ultra-Low-Latency In-Memory Key-Value Store System Design on CPU-FPGA, IEEE Transactions on Parallel and Distributed Systems, Vol.31, No.8, pp.1828-1844, 2020

    [85] Seyedramin Rasoulinezhad, Siddhartha, Hao Zhou, Lingli Wang, David Boland, Philip H. W. Leong, LUXOR: An FPGA Logic Cell Architecture for Efficient Compressor Tree Implementations, 28th ACM International Symposium on Field Programmable Gate Arrays (FPGA2020), pp.161-171, 2020

    [86] Jinyu Xie, Wenbo Yin and Lingli Wang, Achieving Flexible Low-Latency and 100Gbps Line-rate Load Balancing over Ethernet on FPGA, 33rd International System-on-Chip Conference (SOCC), pp. 201-206, 2020

    [87] Hankun Lv, Yuchen Ren, Yunhui Qiu, Wenbo Yin, Lingli Wang, High Throughput and Low Latency Multi-Version Management Key-Value Storage Accelerator, International Conference on Field-Programmable Technology (ICFPT), pp.290-291, 2020

    [88] Yue Li, Wei Cao, Xuegong Zhou, Lingli Wang, A Low-cost Reconfigurable Nonlinear Core for Embedded DNN Applications, International Conference on Field-Programmable Technology (ICFPT), pp.35-38, 2020

    [89] Kaichuang Shi, Hao Zhou, Xuegong Zhou, Lingli Wang, GIB: A Novel Unidirectional Interconnection Architecture for FPGA (Best Paper Award, 最佳论文奖), International Conference on Field-Programmable Technology (ICFPT), pp.174-181, 2020

    [90] Xinxing Shi, Jialin Chen and Lingli Wang, Heuristic Search for Activation Functions of Neural Networks Based on Gaussian Processes, International Joint Conference on Neural Networks (IJCNN), 2021

    [91] Di Wu, Xitian Fan, Wei Cao, and Lingli Wang, SWM: A High-Performance Sparse-Winograd Matrix Multiplication CNN Accelerator, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 29, No.5, pp. 936-949, 2021

    [92] Yuhang Shen, Jiadong Qian, Kaichuang Shi, Hao Zhou, Lingli Wang, Two-level MUX Design and Exploration in FPGA Routing Architecture, International Conference on Field Programmable Logic and Applications (FPL2021), pp.234-241, 2021

    [93] Yunhui Qiu, Wenbo Yin, Lingli Wang, A High-performance Open-channel Open-way NAND Flash Controller Architecture, International Conference on Field Programmable Logic and Applications (FPL2021), pp.91-98, 2021

    [94] Siyu Xiong, Guoqing Wu, Xitian Fan, Xuan Feng, Zhongcheng Huang, Wei Cao, Xuegong Zhou, Shijin Ding, Jinhua Yu, Lingli Wang and Zhifeng Shi, MRI-based brain tumor segmentation using FPGA-accelerated neural network, BMC Bioinformatics, 22:421, 2021

    [95] Jingbo Gao, Yu Qian, Yihan Hu, Xitian Fan, Wai-Shing Luk, Wei Cao, Lingli Wang, LETA: A Lightweight Exchangeable-Track Accelerator for EfficientNet Based on FPGA, International Conference on Field-Programmable Technology (FPT), pp.1-9, 2021

    [96] Jiadong Qian, Yuhang Shen, Kaichuang Shi, Hao Zhou, Lingli Wang, General Routing Architecture Modelling and Exploration for Modern FPGAs, International Conference on Field-Programmable Technology (FPT), pp.148-156, 2021

    [97] Su Zheng, Kaisen Zhang, Yaoguang Tian, Wenbo Yin, Lingli Wang and Xuegong Zhou, FastCGRA: A Modeling, Evaluation, and Exploration Platform for Large-Scale Coarse-Grained Reconfigurable Arrays, International Conference on Field-Programmable Technology (FPT), pp.157-166, 2021

    [98] Yuan Dai, Simin Liu, Yao Lu, Hao Zhou, Seyedramin Rasoulinezhad, Philip H. W. Leong, Lingli Wang, APIR-DSP: An Approximate PIR-DSP Architecture for Error-Tolerant Applications, International Conference on Field-Programmable Technology (FPT), pp.167-174, 2021

    [99] Kaichuang Shi, Hao Zhou and Lingli Wang, A Hexagon-Based Honeycomb Routing Architecture for FPGA, International Conference on Field-Programmable Technology (FPT), pp.179-184, 2021

    [100] Xuan Feng, Yue Li, Yu Qian, Jingbo Gao, Wei Cao and Lingli Wang, A High-Precision Flexible Symmetry-Aware Architecture for Element-Wise Activation Functions, International Conference on Field-Programmable Technology (FPT), pp.282-285, 2021

    [101] Xiaoxi Wang, Moucheng Yang, Zhen Li and Lingli Wang, Parallelized Technology Mapping to General PLBs by Adaptive Circuit Partitioning, International Conference on Field-Programmable Technology (FPT), pp.290-294, 2021

    [102] Yunhui Qiu, Wenbo Yin, and Lingli Wang, A High-Performance and Scalable NVMe Controller Featuring Hardware Acceleration, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol.41, No.5, pp.1344-1357, 2022

    [103] Yunhui Qiu, Yuhang Cao, Yuan Dai, Wenbo Yin, Lingli Wang, TRAM: An Open-Source Template-based Reconfigurable Architecture Modeling Framework, International Conference on Field-Programmable Logic and Applications(FPL), pp.61-69, 2022

    [104] Su Zheng, Jiadong Qian, Hao Zhou, Lingli Wang, GRAEBO: FPGA General Routing Architecture Exploration via Bayesian Optimization, International Conference on Field-Programmable Logic and Applications(FPL), pp.282-286, 2022

    [105] Zhen Li, Su Zheng, Jide Zhang, Yao Lu, Jingbo Gao, Jun Tao, Lingli Wang, Adaptable Approximate Multiplier Design Based on Input Distribution and Polarity, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 30, No. 12, pp.1813-1826, 2022

    [106] K. Shi, X. Zhou, H. Zhou, L. Wang, An Optimized GIB Routing Architecture with Bent Wires for FPGA, ACM Transactions on Reconfigurable Technology and Systems(TRETS), Vol.16, pp.2:1-28, 2022

    [107] Xitian Fan. Guangwei Xie, Zhongchen Huang, Wei Cao, Lingli Wang, Acceleration of Rotated Object Detection on FPGA, IEEE Transactions on Circuits and Systems, Vol.69, No.4, pp.2296-2300, 2022

    [108] Su Zheng, Zhen Li, Yao Lu, Jingbo Gao, Jide Zhang, Lingli Wang, HEAM: High-Efficiency Approximate Multiplier Optimization for Deep Neural Networks, International Symposium on Circuits and Systems(ISCAS), pp.3359-3363, 2022

    [109] Yao Lu, Jide Zhang, Su Zheng, Zhen Li, Lingli Wang,  Low Error-Rate Approximate Multiplier Design for DNNs with Hardware-Driven Co-Optimization, International Symposium on Circuits and Systems(ISCAS), pp.3507-3511, 2022

    [110] Yu Qian, Xuegong Zhou, Hao Zhou, Lingli Wang, Efficient Reinforcement Learning Framework for Automated Logic Synthesis Exploration, 21st International Conference on Field-Programmable TechnologyFPT, pp.221-226, 2022

    [111] Jingyuan Li, Yunhui Qiu, Guowei Zhu, Qilong Zhu, Wenbo Yin, Lingli Wang, THRAM: A Template-based Heterogeneous CGRA Modeling Framework Supporting Fast DSE, International Symposium on Circuits and Systems (ISCAS), DOI: 10.1109/ISCAS46773.2023.10182204, 2023

    [112] Huizhen Kuang, Lingli Wang, Multi-objective Design Space Exploration for High-Level Synthesis via Bayesian Optimization, Interational Symposium of Electronics Design Automation (ISEDA), pp. 150-155, 2023 (Best Paper Award in Digital Design & Verification Track), 2023

    [113] Kaixiang Zhu, Hao Zhou, Wai-Shing Luk, Jun Tao and Lingli Wang, Iterative and Verifiable Retiming for FPGA Performance Optimization, Interational Symposium of Electronics Design Automation (ISEDA), DOI: 10.1109/ISEDA59274.2023.10218458, 2023

    [114] Xinyu Shi, Moucheng Yang, Zhen Li, Kaixiang Zhu, Lingli Wang, Exploration of FPGA PLB Architecture Base on LUT and Microgates, International Symposium of Electronics Design Automation (ISEDA), DOI: 10.1109/ISEDA59274.2023.10218468, 2023

    [115] Jiangnan Li, Chang Cai, Yaya Zhao, Yazhou Yan, Wenbo Yin, Lingli Wang, GRAFT: GNN-based Adaptive Framework for Efficient CGRA Mapping, International Conference on Field-Programmable Technology, pp.25-33, 2023

    [116] Kaichuang Shi, Hao Zhou, Lingli Wang, VIB: A Versatile Interconnection Block for FPGA Routing Architecture, International Conference on Field-Programmable Technology, pp.78-86, 2023

    [117] Jingyuan Li , Yihan Hu , Yuan Dai, Huizhen Kuang, Lingli Wang, AUGER: A Multi-Objective Design Space Exploration Framework for CGRAs, International Conference on Field-Programmable Technology, pp.87-94, 2023

    [118] Huizhen Kuang, Xianfeng Cao, Jingyuan Li, Lingli Wang, HGBO-DSE: Hierarchical GNN and Bayesian Optimization based HLS Design Space Exploration, International Conference on Field-Programmable Technology, pp.105-113, 2023

    [119] Kaichuang Shi, Hao Zhou, Lingli Wang, Explore the Feedback Interconnects in Intra-Cluster Routing for FPGAs, International Conference on Field-Programmable Technology, pp.249-252, 2023

    [120] Moucheng Yang, Kaixiang Zhu, Lingli Wang, and Xuegong Zhou, DSLUT: An Asymmetric LUT and its Automatic Design Flow Based on Practical Functions, International Conference on Field-Programmable Technology, pp.277-278, 2023

    [121] Zhen Li, Hao Zhou, Lingli Wang, and Xuegong Zhou, AMG: Automated Efficient Approximate Multiplier Generator for FPGAs via Bayesian Optimization, International Conference on Field-Programmable Technology, pp.293-294, 2023

    [122] Yuhang Cao, Yunhui Qiu, Xuchen Gao, Qilong Zhu, Wenbo Yin and Lingli Wang, E2-ACE: An Energy-Efficient Reconfigurable Crypto-Accelerator with Agile End-to-End Toolchain, International Conference on Field-Programmable Technology, pp.295-296, 2023

    [123] Qilong Zhu, Yuhang Cao, Yunhui Qiu, Xuchen Gao, Wenbo Yin and Lingli Wang, A Dynamic Partial Reconfigurable CGRA Framework for Multi-Kernel Applications, International Conference on Field-Programmable Technology, pp.297-298, 2023

    [124] Yunhui Qiu, Yiqing Mao, Xuchen Gao, Sichao Chen, Jiangnan Li, Wenbo Yin, Lingli Wang, FDRA: A Framework for Dynamically Reconfigurable Accelerator Supporting Multi-Level Parallelism, ACM Transactions on Reconfigurable Technology and Systems (TRETS), Vol. 17, No.1, Article 4, pp.1-26, 2024

    [125] Yu Qian, Xuegong Zhou, Hao Zhou, and Lingli Wang, An Efficient Reinforcement Learning Based Framework for Exploring Logic Synthesis, ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 29, No. 2, Article 25, pp 1–33, 2024

    [126] Xuchen Gao, Yunhui Qiu, Yuan Dai, Wenbo Yin, Lingli Wang, A CGRA Front-end Compiler Enabling Extraction of General Control and Dedicated Operators, 29th Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 799-804, 2024

    [127] Jiahang Lou, Xuchen Gao, Yiqing Mao, Yunhui Qiu, Yihan Hu, Wenbo Yin and Lingli Wang, An Agile Deploying Approach for Large-Scale Workloads on CGRA-CPU Architecture, Design Automation & Test in Europe Conference & Exhibition (DATE), 2024

    [128] Yuan Dai, Jingyuan Li, Qilong Zhu, Yunhui Qiu, Yihan Hu, Wenbo Yin, Lingli Wang, HETA: A Heterogeneous Temporal CGRA Modeling and Design Space Exploration via Bayesian Optimization, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 32, No. 3, pp. 505-518, 2024

    [129] Sichao Chen, Chang Cai, Su Zheng, Jiangnan Li, Guowei Zhu, Jingyuan Li, Yazhou Yan, Yuan Dai, Wenbo Yin, Lingli Wang, HierCGRA: A Novel Framework for Large-Scale CGRA with Hierarchical Modeling and Automated Design Space Exploration, ACM Trans. Reconfig. Technol. Syst., Vol. 17, No. 2, Article 35, pp.1-31, 2024

    [130] Jingyuan Li, Yuan Dai, Yihan Hu, Jiangnan Li, Wenbo Yin, Jun Tao, Lingli Wang , TransMap: An Efficient CGRA Mapping Framework via Transformer and Deep Reinforcement Learning, IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), pp.626-633, 2024

    [131] Jiangnan Li , Yazhou Yan , Jingyuan Li, Shaoyang Sun, Boyin Jin, Wenbo Yin, Lingli Wang, An Architecture-Agnostic Dataflow Mapping Framework on CGRA, IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW) , pp.618-625, 2024

    [132] Yiqing Mao, Xuchen Gao, Jiahang Lou, Yunhui Qiu, Wenbo Yin, Wai-Shing Luk and Lingli Wang, CFEACT: A CGRA-based Framework Enabling Agile CNN and Transformer Accelerator Design, 34th International Conference on Field-Programmable Logic and Applications (FPL), pp.213-219, 2024

    [133] Shaoyang Sun, Boyin Jin, Jiahang Lou, Jiangnan Li, Yuhang Cao, Jingyuan Li, Chen Shen, Yuan Dai, Wenbo Yin and Lingli Wang, MDCRA: A Reconfigurable Accelerator Framework for Multiple Dataflow Lanes, IEEE 35th International Conference on Application-specific Systems, Architectures and Processors (ASAP), pp.133-134, 2024

    [134] Jiangnan Li, Yazhou Yan, Guowei Zhu, Wenbo Yin, Lingli Wang, An End-to-End Agile Design Framework to Improve Energy Efficiency on CGRAs, IEEE 35th International Conference on Application-specific Systems, Architectures and Processors (ASAP), pp.17-18, 2024

    [135] Zhiqiang Cai, Jialin Chen, Ke Xu, Lingli Wang, Recognizing Good Variational Quantum Circuits with Monte Carlo Tree Search, Quantum Machine Intelligence, 6:36, 2024

    [136] Bo Jiao, Lei Xu, Xinyu Yu, Haitao Yang, Haozhe Zhu, Yu Wang, Jundong Zhu, Dexin Wen, Lingli Wang, Jun Tao, Chixiao Chen, Yinhe Han, Qi Liu, Ninghui Sun, and Ming Liu, FPIA: Communication-Aware Multi-Chiplet Integration With Field-Programmable Interconnect Fabric on Reusable Silicon Interposer, IEEE Tansactions on Circuits and Systems – I, Vol. 71, No. 9, pp.4156-4168, 2024

    [137] Xuchen Gao; Yunhui Qiu; Yuan Dai; Wenbo Yin; Lingli Wang, A CGRA Front-end Compiler Enabling Extraction of General Control and Dedicated Operators, 29th Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 799-804, 2024

    [138] Xizheng Li, Kaichuang Shi, Wai-Shing Luk, Hao Zhou, Lingli Wang, FPGA Routing Optimization Based on Multi-Level MUX Architecture, International Conference on Field Programmable Technology (FPT2024), Dec. 2024

    [139] Huizhen Kuang, Lingli Wang, Compass: A Collaborative HLS Design Space Exploration Framework via Graph Representation Learning and Ensemble Bayesian Optimization, International Conference on Field Programmable Technology (FPT2024), Dec. 2024

    [140] Yiqing Mao, Yanxing Jin, Wai-Shing Luk, Lingli Wang, HBMalloc: Dynamic Memory Management in High-Level Synthesis for FPGA HBM, International Conference on Field Programmable Technology (FPT2024), Dec. 2024

    [141] Jiayin Qin, Yuan Dai, Lingli Wang, CGRA-HD: An Efficient Reconfigurable Accelerator for Hyperdimensional Computing, International Conference on Field Programmable Technology (FPT2024), Dec. 2024

    [142] Jiangnan Li, Zhengyi Zhang, Xuegong Zhou, Lingli Wang, An MLIR-based Compiler for Hardware Acceleration with Recursion Support, International Conference on Field Programmable Technology (FPT2024), Dec. 2024

    [143] Xianfeng Cao, Huizhen Kuang, Yuanqi Wang, Lingli Wang, Two-Phase Transistor Sizing for FPGAs via Bayesian Optimization, ACM International Symposium on Field Programmable Gate Arrays, 2025 (Accepted)

    [144] Yuan Dai, Xuchen Gao, Chen Shen, Bingbing Peng, Wenbo Yin, Wai-Shing Luk, Lingli Wang, Towards Efficient Data Parallelism on Spatial CGRA via Constraint Satisfaction and Graph Coloring, 30th Asia and South Pacific Design Automation Conference (ASP-DAC), 2025 (Accepted)

    [145] Kaixiang Zhu, Wai-shing Luk, Lingli Wang, Yield-driven Clock Skew Scheduling Based on Generalized Extreme Value Distribution, 30th Asia and South Pacific Design Automation Conference (ASP-DAC), 2025 (Accepted)

     

    专利与软件著作权:

    1.名称:多通道红外遥控开关,类别:实用新型,专利号:ZL 93 2 13026.7,授权日期:19935

    2.名称:掩模可编程逻辑器件编程的方法及如此编程的器件,类别:发明专利,专利号:200480022859.7,授权日期:20051

    3.名称:Method for programming a mask-programmable logic device and device so programmed, 类别:美国专利, 专利号:7290237,授权日期:200710

    4.名称:一种现场可编程逻辑阵列的通用互连盒结构及建模方法,类别:发明专利,专利号: ZL 200910050942.X,授权日期:201210

    5.名称:一种可编程逻辑器件互连资源的故障测试方法,类别:发明专利,专利号:ZL 200910050875.1,授权日期:201210

    6.名称:一种现场可编程门阵列的抗辐射性能快速模拟方法,类别:发明专利,专利号:ZL 200910198448.8,授权日期:201211

    7.名称:基于边界扫描的可编程逻辑器件自动测试系统与方法,类别:发明专利,专利号:ZL 201010545055.2,授权日期:20132

    8.名称:FPGA/SOPC后端编译软件[简称:FDE软件] V1.0,类别:计算机软件著作权,登记号:2013SR067117,批准日期:20137

    9.名称:支持用户定制的可编程逻辑器件版图快速生成方法,类别:发明专利,专利号:201210291806.1,授权日期:20157

    10.名称:一种用于FPGA电路位流仿真的方法,类别:发明专利,专利号:201310323430.2,授权日期:20177

    11.名称:一种基于LBP特征的人脸识别硬件架构,类别:发明专利,专利号:201510688167.6,授权日期:20184

    12.名称:融合深度学习神经网络编译软件[简称:FDC软件]V1.0, 类别:计算机软件著作权,登记号:2020SR0185816,批准日期:20202

    13.名称:一种蛋白质鉴定方法及系统,类别:发明专利,专利号:ZL201711113675.7,授权日期:202011

    14.名称:一种低位宽卷积神经网络可重构计算单元,类别:发明专利,专利号:ZL201810318783.6,授权日期:20216

    15.名称:一种可重构卷积神经网络的硬件互连系统,类别:发明专利,专利号:ZL201810358443.6,授权日期:20217

    16.名称:轻量级统一前后端芯片设计的EDA图形界面软件 [简称:UFDE] V1.0, 类别:计算机软件著作权,登记号:2024SR0919383,批准日期:20247

     

    学术活动:

    1. 智能时代的计算结构探讨”, 摩尔精英网络直播:前沿技术分享,2017

    2. 2015年至今担任International Conference on Field Programmable Technology国际会议steering committee member2017年至今担任DVCon China设计与验证国际会议steering committee member

    3. “Customizable FPGA Computing Platform and Reliability Improvement”, China Semiconductor Technology International Conference 2014 (CSTIC 2014), Invited Talk, 2014

    4. “Hardware Acceleration and Reliability Improvement for FPGA-Based Reconfigurable Computing”, The 4th International Workshop on Advanced Technologies in Programmable System on Chip ( ATPSOC 2014 ), Keynote Speech, 2014

    5. 2014年担任第13届现场可编程技术国际会议(International Conference on Field Programmable Technology, ICFPT2014) General Chair (www.icfpt2014.org)

    6. IEEE Council on EDA (Electronic Design Automation) Shanghai Chapter Chair, 2012-2017

    7. Chun Zhang, Lerong Cheng, Lingli Wang, Jiarong Tong, FPGA power and timing optimization: architecture, process, and CAD, 2010 International Conference on Computational Problem-Solving (ICCP), Invited Talk, 2010

    8. 指导学生参加Altera杯中国第五届研究生EDA电子设计竞赛,获团体金奖,清华大学,2005

    9. 国际会议和杂志论文审稿:14th International Conference on VLSI Design, VLSID’2001;

    10. International Conference on Field Programmable Technology, ICFPT;

    11. Asia and South Pacific Design Automation Conference, ASPDAC;

    12. International Conference on Application-specific Systems, Architectures and Processors, ASAP;

    13. International Conference on Theory and Applications of Satisfiability Testing, SAT’2016;

    14. IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsIEEE Transactions on Very Large Scale Integration Systems, IEEE Transactions on Circuits and Systems, ACM Transactions on Embedded Computing Systems, Journal of Systems ArchitectureOptics and Laser Technology,中国科学,计算机辅助设计与图形学学报,电子学报,电子与信息学报,半导体学报, 软件学报,雷达学报,电路与系统学报等


    English Version:

     

    Education & Training

    10.2004 Project Management, Cadence International, UK

    12.2001 Professional Certificate: C and C++ Programming Certified Professional

        Learning Tree International, UK

        Professional Certificate: C++ Object-Oriented Programming Certified Professional Learning Tree International, UK

    12.2001 Learning Tree International training course: “C++ Advanced Programming and design” , UK

    11.2001 Doulos Limited training course: “Comprehensive VHDL”, UK

    4.1998 - 2.2001 School of Engineering, Napier University, Edinburgh, UK

    10.1998 Rutherford Appleton Laboratory, “Cadence/AMS Mixed-Signal Design Flow Course”, Oxford, UK (Cadence version 97A/4.4.1, AMS 0.8µBiCMOS version 3.0.1).

    9.1994 - 7.1997 Department of Electronic Engineering, Zhejiang University, P. R. China

    Work Experience

    5.2010 – now     Full Professor,School of Microelectronics, Fudan University, Shanghai, China

    7.2010 – 8.2010  Sino-Swiss Science and Technology Cooperation, EPFL and TUDelft

    4.2005 – 4.2010  Associate Professor,School of Microelectronics, Fudan University, Shanghai, China

    11.2008 – 12.2008 Visiting Faculty, Cadence Research Lab at Berkeley, USA

    2.2001 – 4.2005  Software engineer (Senior Engineer from 2003), Altera European Technology Centre, Holmers Farm Way, High Wycombe, Buckinghamshire, UK

    2.1996 - 5.1997   Lectured two courses: “Discrete Mathematics”, and “C Language Programming”, Department of Electronic Engineering, Zhejiang University, China.

    8.1990 - 4.1998   Foreign Language Department, Zhejiang University, China



    Publications: Please See above